Using the ATF-10236 in Low Noise Amplifier Applications in the UHF through 1.7 GHz Frequency Range

GaAs FET devices are typically used in low-noise amplifiers in the microwave frequency region where silicon transistors can’t provide the required gain and noise performance. There are, however, many applications in the frequency range below 2 GHz where the low noise figures and high gain of GaAs FETs can improve receiver sensitivity. Typical applications include low noise amplifiers (LNAs) in the 800 to 900 MHz frequency range for use in cellular telephone and pager applications and spread spectrum transceiver applications.

Additional applications include the 1228 and 1575 MHz frequencies used for Global Positioning System (GPS) applications. Other applications include VHF mobile radio, IMMARSAT, and WEFAX, just to name a few. This application note describes two low-noise amplifiers that use the Hewlett-Packard ATF-10236 low noise GaAs FET device. Both designs use identical circuit topology with the only differences being in the proper choice of three inductors depending on the frequency of operation. The designs are centered at 900 MHz and 1575 MHz, but can be scaled for any frequency within the region of 400 to 1700 MHz. Each amplifier has a usable bandwidth of about 30 to 40 percent. Using a high-gain, high-frequency GaAs FET at VHF poses special problems. Of greatest concern is the problem of designing the amplifier for unconditional stability. Typically, GaAs FETs have greater gain as frequency is decreased, e.g., 25 dB maximum stable gain at 500 MHz. A second problem is that matching the typical microwave GaAs FET at lower frequencies for minimum noise figure does not necessarily produce minimum input VSWR. Achieving the lowest possible noise figure requires matching the device to Gopt (the source match required for minimum noise figure). At higher microwave frequencies this will generally produce a reasonable input VSWR, since Gopt and the complex conjugate of the device input reflection coefficient S11 are usually close on the Smith Chart. At lower frequencies, special consideration needs to be given to the input circuit design and to the tradeoffs required to ensure low noise figure while still achieving moderate gain, low VSWR and unconditional stability. Device Family This application note will discuss the use of the ATF-10236 series of low noise GaAs FET devices. The device has a 500 micron gate periphery and is most suitable for applications in the VHF through 4 GHz frequency range. The device is tested for noise figure and gain at 4 GHz where it is typically used in satellite TVRO applications. The ATF-10136 is the premium device being specified at 0.6 dB maximum noise figure while the ATF-10236 is specified at a 1.0 dB maximum and the ATF-10736 is specified at a 1.4 dB maximum all at 4 GHz. Typically a three stage device lineup is used at C band with the ATF- 10136 device being used as the first stage followed by the ATF- 10236 followed by the ATF-10736. The higher noise figure of the second and third stages has minimal effect on the over all cascade noise figure. A three stage low-noise amplifier with greater than 30 dB of gain is 5966-0166E 5-6 generally required at C band to overcome filter/mixer losses. While there is considerable difference in noise figure at 4 GHz between the three devices (i.e. 0.8 dB), the difference in the 1 to 2 GHz frequency range is less than several tenths of a dB. In actual circuits built on low cost FR-4 dielectric material, the ATF-10236 device is capable of a 0.5 dB noise figure at 900 MHz and a 0.75 dB noise figure at 1575 MHz. Most commercial applications at frequencies below 2 GHz generally do not require the high gain of a three stage cascade so generally a single stage LNA is used followed by a bipolar device or a silicon MMIC. Cascading the ATF-10236 with a 3.5 dB noise figure MMIC such as the MSA-0686, will still result in about a 1 dB noise figure LNA with 25 to 30 dB gain. The Hewlett-Packard ATF-10236 is supplied in the low cost commercial 0.100 inch “micro-X” metal/ ceramic package. Examination of the data sheet reveals that the device is capable of a 0.6 dB noise figure at frequencies below 2 GHz with an associated gain of greater than 16 dB. The noise parameters and S-parameters of this transistor are summarized in Table 1. Design Technique Obtaining the lowest possible noise figure from the device requires that the input matching network convert the nominal 50 W source impedance to Gopt. This produces a deliberate impedance mismatch that, while minimizing amplifier noise figure, produces a high input VSWR. The ideal situation is where Gopt is the complex conjugate of S11 (i.e., S11*). For this condition, minimum noise figure is achieved when the device is matched for minimum VSWR. This situation occurs predominantly above 2 GHz and tends to diverge at lower frequencies, where S11 approaches 1. High input VSWR has varying significance, depending on the application. Most noteworthy is the increased uncertainty of the noise figure measurement due to reflections between the noise source and amplifier input. Having a noise source with a very low output VSWR and one whose VSWR has minimal change between the “on” and “off” states will minimize this uncertainty. One such noise source is the Hewlett- Packard HP346A with a nominal 5 dB Excess Noise Ratio (ENR). Similarly, when the amplifier is connected to a receive antenna, high input VSWR creates added uncertainty in overall system performance. The effect is difficult to analyze unless an isolator is placed at the input to the amplifier. The use of an isolator, however, adds excessive loss and, at VHF frequencies, the size of the isolator is often prohibitively large. To examine the alternatives, constant noise figure and constant gain circles can be constructed to assess the impact of trading increased noise figure for a decrease in input VSWR and a corresponding increase in amplifier gain. In most instances, the result is a much higher noise figure than really desired. One option is to use source feedback. This subject has already been covered by several authors (References 1- 3). Source feedback, in the form of source inductance, can improve input VSWR with minimal noise figure degradation. The drawback of utilizing source inductance is a gain reduction of up to several decibels. However, GaAs FET devices often have more gain than desired at low frequencies, so the penalty is not severe. The effect of source inductance on amplifier input match is best studied with the help of a computer simulation. The microwave design simulation program from Hewlett-Packard EEsof called Touchstone™ is used to analyze S11 of the amplifier with the proposed output matching network. S11 was measured looking directly into the gate of the device with the source inductance added between the source and ground. With the ATF-10236 at 500 MHz, adding the equivalent source inductance of two 0.10 inch leads causes the value of S11 to decrease from 0.970 to 0.960. Angle remains relatively constant at about -20 degrees. Gopt remains relatively unchanged with the addition of source inductance. Comparing S11 to Gopt at 500 MHz now shows them to be nearly identical. The result is that minimum noise figure and minimum VSWR will coincide more closely with one another when matching the device for minimum noise figure. Plotting Gopt for the ATF-10236 device from 450 MHz through 2 GHz in Figure 1 shows that Gopt lies very near the R/Z0=1 curve. This implies that a series inductance will provide the necessary match to attain minimum noise figure. The simplest way to incorporate source inductance is to use the device source leads. Using device leads as inductors produces 5-7 mode is invaluable for determining the optimum lead length for a given performance. Table 2 shows the effect of lead length on gain, noise figure, stability, and input and output VSWR at 900 MHz. It is clear that lead lengths of 0.06 inch or less have a minor effect on noise figure while improving input match substantially. Gain does suffer, but this is not a major concern. An added benefit of using source inductance is enhanced stability as evidence by the Rollett stability factor, k. Excessive source inductance can have an adverse effect on stability at the higher frequencies. In the case of the 900 MHz amplifier, zero length source leads create potential instability at low frequencies while longer source lead length creates potential instability at high frequencies, i.e. 6.6 GHz. It is determined that 0.060 inch source lead length is an optimum choice based on all parameters. The optimum source lead length varies with frequency of operation. At 1575 MHz, 0.020 inch source lead length provides effect of the lead inductance can be analyzed by simulating the inductance as a high-impedance transmission line. The TUNE approximately 1.3 nH per 0.100 inch of source lead, or 0.65 nH for two source leads in parallel. With the help of Touchstone™, the Table 1. Scattering and Noise Parameters for the Hewlett-Packard ATF-10236 GaAs FET, Vds = 2 volts and Ids = 25 mA Scattering Parameters: Common Source, Zo = 50 W Freq S11 S21 S21 S22 GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang 0.5 .97 -20 15.1 5.68 162 -32.8 .023 76 .47 -11 1.0 .93 -41 14.9 5.58 143 -26.0 .050 71 .45 -23 2.0 .77 -81 13.6 4.76 107 -21.3 .086 51 .36 -38 Noise Parameters Frequency Noise Figure Gamma Optimum Rn/50 GHz dB Mag Ang normalized 0.5 0.45 0.93 18 0.75 1.0 0.5 0.87 36 0.63 2.0 0.6 0.73 74 0.33 Figure 1. ATF-10236 Go vs. Frequency at Vds = 2 volts and Ids = 25 mA. 0.2 0.5 1.0 2.0 1.0 0.5 0.5 0.2 0.2 1.0 2.0 2.0 2000 MHz 1000 MHz 500 MHz 5-8 optimum performance with unconditional stability up to 12 GHz. Decreasing source lead length improves stability at 12 GHz while making k<1 at 400 MHz. Adding series resistance in the output matching circuit increases stability over a wide frequency range. The effect of adding a series resistor R10 on amplifier performance is also shown in Table 2. Achieving the associated gain of which the device is capable is difficult since the device is not inherently stable. It is not enough that the amplifier be stable at the operating frequency – it must be stable at all frequencies. Any outof- band oscillation will make the amplifier unusable. The simplest technique to ensure broad-band stability is to resistively load the drain. Resistive loading produces a constant impedance on the device over a wide frequency range. In the case of the ATF-10236, a 50 W resistor and a small amount of series inductance is used to load the output of the device. The series inductance provides some impedance matching. This produces acceptable gain while ensuring a good output match and retaining stability over as wide a bandwidth as possible. The amplifier circuit is shown in Figure 2. For simplicity, the original LNA used the self- biasing technique to set the bias point. The loss in noise figure associated with the bypassed source resistor topology is no greater than 0.1 dB at these frequencies. The 33 W resistor between the source and ground sets the drain current while the 100 W resistor sets the drain voltage. There is some interaction, however, between the two resistors. The supply voltage is regulated by the TL05 5 volt regulator U2. The disadvantage of the self biasing technique is that variations in Pinchoff Voltage (Vp) and Saturated Drain Current (Idss) that may occur from one production run to another may dictate the need to change the value of the source resistor. The calculation to determine the source resistor RS is as follows. Table 2. Simulated 900 MHz amplifier performance vs. source lead length , R10 = 0 W. Lead Noise K at 900 K at 6.6 K at 10 Length LL1 Figure Gain |S11|2 |S22|2 MHz GHz GHz 0 inch 0.54 dB 20.1 dB -4.9 dB -8.8 dB 0.58 2.94 1.65 0.06 inch 0.56 dB 18.0 dB -12.2 dB -12.7dB 1.011 2.39 1.09 0.2 inch 0.62 dB 14.4 dB -12.7 dB -18.0 dB 1.57 0.35 1.47 Simulated 900 MHz amplifier performance vs. source lead length , R10 = 16 W. Lead Noise K at 900 K at 6.6 K at 7.5 K at 10 Length LL1 Figure Gain |S11|2 |S22|2 MHz GHz GHz GHz 0 inch 0.56 dB 18.7 dB -4.6 dB -12.0 dB 0.66 4.05 3.05 2.15 0.06 inch 0.58 dB 16.6 dB -11.7 dB -13.6 dB 1.22 3.36 2.50 1.15 0.2 inch 0.65 dB 13.2 dB -14.7 dB -13.3 dB 1.96 0.35 -0.14 1.98 This agrees favorably with the 33 W resistor used in the actual amplifier. The preferred alternative in a production environment is the use of an active bias network as described in Figure 3. Although active biasing does add cost by requiring extra components, including a way of generating a RS = [ Vp (1 – Id Id/ Idss ) ] Assuming typical device parameters of: yields: Idss = 130 mA Vp = -1.3 volts Id = 25 mA Rs = 29.2 ohms 5-9 negative voltage, the advantages generally outweigh the disadvantages. Active biasing offers the advantage that variations in VP and Idss won’t necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets Vgs for the desired drain voltage and drain current. The active biasing scheme for FETs requires that the source leads be grounded and an additional supply be used to generate the negative voltage required at the gate for typical operation. Direct grounding the FET source leads has the additional advantage of not requiring bypass capacitors to bypass a source resistor that would typically be used for self biasing in a single supply circuit. When the source bypass capacitors are removed , the source lead length must be increased as suggested in Figure 3 to offset the decrease in series inductance. When active biasing is used, the cold end of the 100 ohm resistor, R1, in the gate network must be bypassed to ground with a 1000 pF capacitor instead of being dc grounded. This allows gate voltage to be applied. Referring to Figure 3, resistors R6 and R8 provide a regulated voltage at the base of Q2. The voltage is increased by 0.7 volts by virtue of the emitter-base junction of Q2 and then applied to the drain of Q1 through resistor R3. Since R3 is included in the RF matching circuit, the voltage drop across R3 must be taken into account when designing the bias circuitry. Resistor R9 is connected between two regulated voltage points and therefore sets the drain current. Q1 gate is connected to a voltage divider consisting of R5 and R7 connected between the collector of Q2 and a negative voltage converter. The gate voltage can then assume a value necessary to sustain the desired drain voltage and current as predetermined by R6, R8, and R9. Measurements On Amplifiers The actual measured performance of the amplifiers compares favorably to that predicted by the computer simulation. Table 3 summarizes the gain, noise figure Figure 2. Schematic of the GaAs FET amplifier using passive biassing. The only change required to modify the frequency operation is the proper choice of RFC1, L1, and LL1/LL2. Zo Zo INPUT C1 L1 Zo Zo U3 Zo Zo Q1 L2 R1 R2 LL1/2 C2 C3 C7 R3 R4 C9 C12 C13 U2 R9 OUTPUT Vcc C1, C2, C3 = 100 pF CHIP CAPACITOR C5, C6, C7, C9 = 1000 pF CHIP CAPACITOR C12, C13 = 0.1 mF CAPACITOR Q1 = HEWLETT-PACKARD ATF-10236 GaAs FET R1 = 100 W CHIP RESISTOR R2 = 27 W CHIP RESISTOR R3, R9 = 50 W CHIP RESISTOR R10 COMPONENTS COMMON TO ALL AMPLIFIERS: FREQUENCY 900 MHz 1575 MHz RFC1 0.33 mH 0.18 mH L1 5T #26 2T #28 0.075″ ID 0.050″ ID CLOSEWOUND CLOSEWOUND LL1/LL2 0.060″ 0.020″ R4 = ADJUST FOR DESIRED MMIC CURRENT R10 = 5 TO 25 W CHIP RESISTOR USED TO IMPROVE STABILITY AND OUTPUT RETURN LOSS (SEE TEXT) U2 = 5 VOLT REGULATOR, TOKO TK11650U U3 = HEWLETT-PACKARD MSA-SERIES MMIC PROVIDES ADDITIONAL GAIN – OPTIONAL Zo = 50 W MICROSTRIPLINE C5 C6 COMPONENTS CHANGED WITH FREQUENCY OF AMPLIFIER 5-10 Figure 3. Schematic of the GaAs FET amplifier using passive biasing. The only change required to modify the frequency operation is the proper choice of RFC1, L1, and LL1/LL2. and VSWR parameters. The noise figure of the 900 MHz amplifier is actually a little lower than the simulation would predict while the gain is very comparable. The input return loss measured 5.6 dB versus 12.2 dB according to the simulation. The difference between measured and simulated may be due to the loss of the RF choke in the input circuit. The input VSWR could be improved by increasing source inductance while paying careful attention to stability. The last alternative is to sacrifice some noise figure for a better input match. Output return loss measured 13.2 dB which compares favorably to the 12.7 dB predicted by the computer simulation. The noise figure of the 1575 MHz amplifier was measured at 0.73 dB which is higher than the 0.45 dB as predicted. This can be explained by the dielectric board losses of the FR-4. The loss of the FR-4 accounts for 0.3 dB of loss at 1575 MHz. This was verified by cutting off the input section of the board , attaching two SMA connectors and carefully measuring the loss. Measured gain with the output series resistor R10 measured 12.5 dB which is within 1.3 dB of the computer simulation. Gain increases to 14.3 dB without R10. Input return loss measured 6.7 dB while the output return loss measured 15 dB which is fairly close to the computer simulation. Stability is very good with no problems noted when cascading stages. The swept gain plots (included in Figures 4-5) show the wide bandwidth of these amplifiers. Low noise figure is also retained over the bandwidth. The 900 MHz Zo Zo INPUT C1 L1 Zo Zo U3 Zo Zo Q1 L2 R1 R5 LL1/2 C2 C3 C4 C7 C8 R3 R4 C9 C12 C10 C11 C13 U2 R7 R9 R6 R8 Q2 OUTPUT Vcc C1, C2, C3 = 100 pF CHIP CAPACITOR C4, C7, C9 = 1000 pF CHIP CAPACITOR C5, C6, = NOT REQUIRED, REPLACE WITH COPPER STRAP C8, C12, C13 = 0.1 mF CHIP CAPACITOR C10, C11 = 10 mF CHIP CAPACITOR Q1 = HEWLETT-PACKARD ATF-10236 GaAs FET Q2 = SIEMENS SMBT 2907A PNP TRANSISTOR R1 = 100 W CHIP RESISTOR R2 = NOT REQUIRED R3 = 50 W CHIP RESISTOR U1 R10 COMPONENTS COMMON TO ALL AMPLIFIERS: FREQUENCY 900 MHz 1575 MHz RFC1 0.33 mH 0.18 mH L1 5T #26 2T #28 0.075″ ID 0.050″ ID CLOSEWOUND CLOSEWOUND LL1/LL2 0.090″ 0.050″ NOTE: LENGTH OF LL1 AND LL2 INCLUDES LENGTH OF COPPER STRAP USED TO REPLACE C5 AND C6. R4 = ADJUST FOR DESIRED MMIC CURRENT R5, R7 = 10K W CHIP RESISTOR R6 = 1.1K W CHIP RESISTOR R8 = 1K W CHIP RESISTOR R9 = 70 W CHIP RESISTOR R10 = 5 TO 25 W CHIP RESISTOR USED TO IMPROVE STABILITY AND OUTPUT RETURN LOSS (SEE TEXT) U1 = LINEAR TECHNOLOGY LTC1044CS8 VOLTAGE CONVERTER U2 = 5 VOLT REGULATOR, TOKO TK11650U U3 = HEWLETT-PACKARD MSA-SERIES MMIC PROVIDES ADDITIONAL GAIN – OPTIONAL Zo = 50 W MICROSTRIPLINE COMPONENTS CHANGED WITH FREQUENCY OF AMPLIFIER 5-11 Table 3. Measured amplifier performance vs. computer simulation (* indicates R10 = 16 W, ** indicates R10 = 0 W) Noise Frequency Figure Gain |S11|2 |S22|2 900 MHz measured 0.46 dB 16.7 dB -5.6 dB -13.2 dB simulated 0.56 dB 18.0 dB -12.2 dB -12.7 dB 1575 MHz measured 0.73 dB 12.5 dB * -6.7 dB -15.0 dB 14.3 dB ** simulated 0.85 dB 13.8 dB -8.3 dB -12.2 dB amplifier has a maximum of 0.5 dB noise figure between 800 and 1000 MHz. Similarly, the 1575 MHz amplifier has less than a 1 dB noise figure from 1200 MHz to 1700 MHz. At frequencies above 2 GHz, the ATF-10236 is rated for minimum noise figure when operated at Vds of 2 V, and Id of 25 mA. At frequencies below 2 GHz, it was empirically determined that an additional 0.1 dB reduction in noise figure is possible if the device is rebiased. At 900 MHz, 1 V gave the lowest noise figure while 1.5 volts is optimum for 1575 MHz. Using The Design At Other Frequencies The basic amplifier design can be adapted for any frequency in the 400 to 1600 MHz range. Scaling the input inductor (L1) will allow operation on a different frequency. The graph shown in Figure 6 gives some idea of the relationship of L1 vs. frequency. Source feedback should be adjusted accordingly. The ATF-10236 has been used successfully in circuits operating at as low as 150 MHz with similar results. GaAs FET Demonstration Board A demonstration board built on 0.031 inch FR-4/G-10 is shown in Figures 7 and 8. The board as shown can be set up with either passive or active biasing. If desired an additional gain stage in the form of a silicon MMIC such as the Hewlett-Packard MSA series can be used for additional gain at a slight increase in overall cascade noise figure. A later improved version of the artwork has the locations of R1 and L2 reversed. The mounting pad for R1 and L2 has an adverse effect on noise figure. It is therefore better to have the RF choke first then followed by the resistor since the impedance of the choke is higher than that of the resistor. An additional resistor R10 can be added in series with capacitor C2 in order to improve stability and output return loss of the first stage. As an example, the use of a 16 W resistor at R10 will decrease gain by about 1 dB while improving output match and stability. It may also help when cascading the FET stage with the MMIC or another device. The measured loss of the input microstripline excluding the blocking capacitor C1 is 0.3 dB at 1600 MHz and 0.15 dB at 900 MHz. Keep this loss in mind when evaluating the devices as most computer simulations appear to be optimistic about dielectric board losses and therefore give an optimistic (lower) prediction of noise figure. 30 20 10 0 -10 -20 -30 100 500 900 1300 +16.45 dB +895.00 MHz 1700 2100 FREQUENCY (MHz) GAIN (dB) Figure 4. Typical swept gain performance of 900 MHz amplifier. Figure 6. Inductance L1 vs. optimum frequency. 150 100 50 0 0.1 0.5 1.0 1.5 2.0 FREQUENCY, GHz INDUCTANCE, nH 30 20 10 0 -10 -20 -30 100 500 900 1300 +14.31 dB +1.5700 MHz 1700 2100 FREQUENCY (MHz) GAIN (dB) Figure 5. Typical swept gain performance of 1575 MHz amplifier. 5-12 Figure 7. GaAs FET Demo board showing component placement. For best peformance reverse the location of R1 and L2 (see text). Figure 8. GaAs FET Demo board 1X artwork. In Case Of Difficulty Generally the noise figure should be within a couple or three tenths of a dB of that indicated in the performance table and gain within a few dB. If the noise figure or gain is not as expected then check the bias conditions. Is the Vds between 1 and 2 volts and drain current 20 to 25 mA? If the bias voltage and current is adjustable, does performance maximize at the rated bias conditions or at some other set of values? If so, then the problem may be excessive source inductance which is causing a high frequency oscillation. If a device is oscillating at any frequency, even an out-of-the-band frequency, it may be difficult to obtain rated performance. Shorten the source lead length or find a source bypass capacitor with lower parasitic inductance. The design assumed 0.4 nH of associated inductance for the 1000 pF source bypass capacitors. If the problem is inband stability, then the solution is to add series resistance between the drain and output connector. This in series with blocking capacitor C2. Additional gain reduction can also be had by decreasing the length of the shunt output inductor between R3 and C7. In some cases, higher than expected noise figure can be attributed to noise from the dc to dc converter or the PNP transistor used for active biasing. Additional use of 0.1 mF bypass capacitors at C4 and C8 may be necessary. The use of a lossy or low Q RF choke for L2 can contribute to an increase in noise figure. The use of small molded RF chokes for L2 works well in prototypes. For surface mount applications be sure to choose a high Q wire-wound choke such as those made by CoilCraft. In some instances, the enclosure can cause undesirable feedback across the circuit board which can cause instabilities. This phenomena is true of any amplifier design. A cross sectional view of the housing can be viewed as a piece of waveguide whose dimensions, both width and height, determine the band of frequencies that it may pass with minimal attenuation. A combination of the amplifier response along with the housing response could contribute to instabilities if not controlled. The use of low profile surface mount components will minimize this effect. Making sure that the cover is no closer to the printed circuit board than is necesary will minimize coupling from the cover. It is preferred to have the cover at least 0.3 to 0.5 inches above the circuit board. RF Absorptive material such as ECOSORB™ can be used on the cover to minimize reflections if the cover has to be in close proximity to the board. The use of a metal divider hanging down from the cover is also another method of breaking up enclosure effects. .031 FR-4 GaAsFET DEMO BD INPUT C1 C4 C6 R3 C7 L2 R2 C8 R1 C5 C2 C3 C9 R7 R9 U2 R6 R8 C12 R5 C10 U1 C13 C11 R4 U3 OUTPUT Vdd 2.1″ .031 FR-4 GaAsFET DEMO BD INPUT C1 C5 L1 2.1″ C2 OUTPUT R3 C9 R4 U3 C3 C7 C8 U1 U2 R7 R6 C12 C13 R8 R9 L2 C4 R5 C10 C 11 R1 C6 R2 Vdd 5-13 Amplifier Tuning Due to the inherent broad bandwidth of these amplifiers, they should require no RF tuning in production. With the use of active biasing, the ampifiers should power up at the proper bias point without any further adjustment required. The frequency at which minimum input VSWR will occur corresponds automatically with minimum noise figure and maximum gain. As shown in the foregoing data, the noise figure varies very little over a wide bandwidth, so it might be advantageous to tune for minimum input VSWR as opposed to noise figure. Without the source inductance, the input VSWR will be considerably higher. Since the noise matching network is low Q it does offer broad bandwidth and insensitivity to tolerance on the series inductor. According to the computer simulation, varying the input inductor L1 from its nominal value of 7 nH to a low of 5 nH to a high of 10 nH increases the noise figure less than 0.2 dB. To minimize cost, the lumped inductor can be replaced by a microstripline .010 inches wide by 0.28 inches long at the expense of 0.2 to 0.3 dB increase in noise figure. See computer simulation in the Appendix. The simple series L/R matching network in the output circuit forces a good broadband low VSWR output match. Due to the finite amount of reverse isolation of the device, the output match is affected by the input match and vice versa. Therefore the frequency of best output VSWR is somewhat dependent on where the input network is optimum. Power Output The use of heavy resistive loading in the output circuit to obtain broadband stability can be expected to limit the power output capability of the amplifier. Despite the resistive loading the 900 MHz amplifier has a measured 1 dB gain compression point of 5 mW when biased at a Vds of 1 volt and Ids of 20 mA. Operation At Reduced Current For applications that are more current conscious, the 900 MHz amplifier was tested at various drain currents from 1.5 mA to 25 mA with a constant Vds of 1 volt. The graph shown in Figure 9 reflects typical performance at reduced drain current without readjusting either the input or output impedance match. The S Parameters shown in Tables 4, 5, and 6 can be used to help design an amplifier for a specific low current application. The noise parameters at the nominal bias (Table 1) will provide a good starting point for a design at lower current. Other Applications The basic ATF-10236 amplifier circuit can also be successfully used as a mixer for either upconverting or downconverting an input signal. As a downconverter, use the RF input as the input port and use the RF output port as the local oscillator input port. Only a few milliwatts of LO is required at this port. This is termed a drain pumped mixer. The IF can be taken off of the drain bias decoupling line. The drain bias decoupling line should be bypassed with a fairly low value of capacitance such that the normally low frequency of the IF can still pass through and be coupled out to the IF port through a low pass matching network. Mixer design is covered in more detail in application note AN-G005. Conclusion The results show that highfrequency GaAs FETs can be used very successfully in the VHF through 1700 MHz frequency range with very simple circuit techniques. Noise figures of 0.5 dB at 900 MHz and 0.73 dB at 1575 MHz are possible using the inexpensive ATF-10236 GaAs FET device on an inexpensive epoxy glass dielectric printed circuit board. The single-element input matching network provides very good performance in this frequency range and offers the greatest bandwidth and least sensitivity to manufacturing tolerances. The resistive loading in the output network provides the best broadband stable performance by sacrificing some in-band gain. The computer simulation programs are instrumental in analyzing overall amplifier performance.